KiCad 8.0.2

What's new in this version:

General:
- Correctly resolve variable ${CURRENT_DATE} in title block
- Correct too thin over bar when exporting to PDF with non-default font
- Add environment variable for configuring stock data home path
- Fix a library tree pane search issues
- Fix rendering/plotting of arcs with tiny angle and huge radius
- Add autocomplete accept and cancel to the hotkeys list
- Fix selected item count in the properties panel
- Add newline to end of file
- Reduce the number of displayed digits for coordinate edit controls
- Fix Arial font drawing artifacts
- Add missing file icons
- Add libgit2 version 1.8.0 compatibility
- Fix crash in configure paths using non-ascii characters in column headers

Schematic Editor:
- Allow the simulation DC operating point labels to be repositioned
- Show pin names in footprint viewer after assigned to symbol
- Always define default net class even when it doesn’t exist
- Support importing Altium ASCII schematic files
- Place items on root sheet when it’s the only sheet when importing EasyEDA schematic
- Support dot and clock symbol pin styles when importing EasyEDA schematic
- Support multiple sheet schematics on EasyEDA import
- Fix broken paste special keep existing symbol annotations
- Do not update schematic connectivity for irrelevant property changes
- Fix database library cache memory leak
- Do not tab focus on random symbol when cross probing
- Fix warning due to unused angle in EasyEDA Pro schematic parser
- Do not open ERC dialog when clicking ERC marker
- Select correct ERC dialog entry when double clicking ERC marker
- Check for bus no-connects in ERC
- Maintain hierarchy navigator expansion state between edits
- Update hierarchy navigator when undoing or redoing sheet name changes
- Fix incremental connectivity issue
- Make nets with net class directives remember which net class they belong to
- Close file when written on BOM export
- Fix missing instance data when reusing an already loaded schematic
- Fix crash on consecutive symbol changes with different pin counts

Spice Simulator:
- Allow deletion of a user-defined signal
- Remove unsaved flag (*) from title bar after saving simulation workbook
- Use correct tooltip for tune resistor series buttons
- Don’t show hidden text in symbol previews
- Close active cell editor when showing/hiding columns in symbol fields editor
- Add option to preserve custom power flag values in "Update Symbols from Library" dialog

Symbol Editor:
- Set description on Altium imported symbols
- Do not allow to selection of invisible pins and fields
- Expose units and alternate body style to properties panel

Board Editor:
- Run edge cuts and margin clearance tests on zone layers
- Don’t allow selection of hidden footprint text in board editor
- Make Edit Track & Via Sizes dialog "specified sizes" dropdowns clearer
- Remove netclass/custom rule handling from Track & Via Properties
- Do not flag blind via’s on different layers as "Drilled holes too close together" by DRC
- Allow specifying a minimum for a via count constraint
- Fix crash in EasyEDA importer when Name/Prefix type text is not in a footprint.
- Fix position and orientation of footprint graphics on Fabmaster (CADENCE ASCII) import
- Fix zone cross-probing from DRC dialog.
- Fix crash when importing Altium PcbDoc
- Fix Eagle board import when footprint library versions exist
- Improve performance when toggling view of rats nest lines assigned to net classes
- Correctly handle locked table cells
- Fix when swapping layers
- Fix issue for boards with round outline on STEP export
- Handle small segments connecting two arcs better
- Correctly translate Chinese characters in gerber file output
- Fix clearance violation between a filled zone and a net tie polygon
- Add toggle horizontal, vertical, 45 degree mode entry to the measure tool’s context menu.
- Fix performance issue when editing length tuning on net inspector highlighted net
- Fix excessive hang after a move and undo
- Sort netnames in properties panel
- Fix zone fill pad connection issues
- Expose groups to property manager
- limiting text height and width to 1 mil
- Fix stack overflow when running DRC
- Fix ghost footprint reference after moving than undoing
- Improve DRC performance due to user interface yields
- Do not how negative track length after deleting length tuned track in net inspector
- Fix slow selection time when calculating clearance
- Fix freeze when selecting two zones on the same layer with different nets
- Fix race condition in zone fill
- Avoid crashing on missing tracks when importing from CADSTAR
- Prevent PNS router from creating tracks with clearance violations
- Do not violate DRC rules when dragging via
- Add corrections to IPC2581 export syntax.
- Update footprint field when changing footprints
- Fix crash when opening board
- Prevent tracks from disappearing on move
- Fix crash when box selection contains a via and a rule area
- Do not drop segments when rerouting existing track and "remove redundant track" is set
- Fix reversed text in flipped footprints
- Fix hang after moving footprint
- Do not fail when cannot construct a wire on STEP export
- Fix misaligned solder mask for chamfered pads in gerber output
- Fix zone fill crash with custom design rule with courtyard condition

Footprint Editor:
- Fix importing EasyEDA footprints
- Report location of future format errors when reading footprints
- Fix crash when pressing a number key

3D Viewer:
- Improve STEP model import precision
- Fix graphic issues with zero thickness copper
- Allow setting colors not in board stackup when the board stackup option is set
- Fix cryptic error message "input line too long" when importing 3D model fails

Gerber Viewer:
- Show "Edit Grids…?" menu entry

Python scripting:
- Fix SWIG wrapper of PAD AddPrimitive() method

Command Line Interface:
- Add missing text variable override when plotting gerbers
- Fix crash when processing schematic that references title block variables

Windows:
- Change the platform detection order
- Accept hotkey using Alt key modifier